Alongside right now’s disclosure of the Rialto Bridge accelerator, Intel can be utilizing this week’s ISC occasion to ship a short replace on Sapphire Rapids, the corporate’s next-generation Xeon CPU which is delivery later this yr. Whereas Intel has been beating the drum for his or her forthcoming, 4th Technology Xeon Scalable chip for some time, we’ve but to listen to something of significance about its anticipated efficiency – significantly within the HPC house. So forward of its formal launch a bit later this yr, Intel is lastly speaking a bit concerning the anticipated efficiency of the HBM-equipped model of the chip, which is aimed particularly on the HPC/supercomputing crowd.
Intel’s first tiled Xeon processor, Sapphire Rapids can be Intel’s first CPU to supply non-compulsory on-chip HBM reminiscence, which is being dubbed Sapphire Rapids Plus HBM. The addition of 64GB of HBM2e makes it a reasonably complicated and costly chip, but in addition one with entry to way more reminiscence bandwidth than any x86 CPU earlier than it. Because of this, the chip is of specific curiosity to a subset of the high-performance compute group, because it gives another route for workloads that aren’t appropriate for GPUs, however nonetheless want entry to huge quantities of reminiscence bandwidth.
As a part of their ISC presentation right now, Intel is releasing two slides with efficiency figures for the HBM model of Sapphire Rapids (Sapphire Rapids Plus HBM). The concept right here is to point out off the mixture of structure enhancements – and particularly, the devoted accelerator blocks – mixed with utilizing 64GB of HBM2e reminiscence to maintain these blocks properly fed. The pre-production processors are being in comparison with Intel’s Xeon Platinum 8380 (Ice Lake-SP) chips.
Allowing for that these are going to be cherry-picked efficiency figures, Intel is seeing anyplace between a 2x speed-up in issues just like the WRF climate forecasting mannequin, to over a 3x enchancment for the CloverLeaf Euler equation solver. Each of that are considerably slim use instances, however necessary ones for the HPC market phase.
Sapphire Rapids Plus HBM is because of be launched alongside the remainder of the Sapphire Rapids household later this yr. Based on Intel’s present roadmaps, it’s due for a successor within the 2023 timeframe, earlier than all the HBM-equipped Xeon lineup is because of be rolled into the Falcon Shores XPU in 2024.
